Micro-Scale  Systems

Integrated Systems  

Die Scale Modules

Die Scale Modules (DSMs) are assembled with the primary system function integrated circuit (IC) being integrated into the module in die form.  Typically this function will be the largest die in the system and hence will set the minimum footprint for the module.  


For Die Scale Modules, the remaining semiconductors will typically be in die form as well, but Chip Scale Packaged devices can be supported as well.  Components up to a design dependent height can be placed "in plane" with the components as well.  These are usually local bypass caps, termination networks, impedance matching networks, etc.  Larger Surface Mount Devices can be mounted on top of the finished module if necessary.  The DSM is usually packaged as a BGA but other options are available. 

Die Scale Module Example

The device shown is an AC - DC power supply implemented as a Die Scale Module (DSM). Underneath the SMT devices mounted on top of the device are over 50 semiconductor and passive components inlay'd into a single polymerized  plane. 


For reference, this DSM is under 8mm x 6mm on a side. 


Package Scale Modules 

Package Scale Modules (PSMs) are assembled with the primary system function integrated circuit (IC) being integrated into the module in packaged form.  Typically this IC is IO intensive and often found in a fairly large package (31mm x 31mm for example).  


For Package Scale Modules, supporting components and semiconductor devices are placed in a plane or planes below the packaged part.  The grouping of the additional functionality is typically by function (for example, a memory plane the size of the packaged part might be directly under it).  In this case, the packaged device mounts onto the plane, which in turn is balled and would mount to a PCB.  


Package Scale Module Example

Two views are shown of a concept Package Scale Module.  


The top drawing is a side view of a packaged FPGA based Package Scale Module.  In this view, the FPGA is sandwiched by thermal management on the top and a Die Based Plane on the bottom.  


The bottom drawing is a top view of the Die Based Plane showing the resources inlay'd in the plane.  In this case, the die plane contains all the resources required to boot the FPGA and utilize the FPGA's processor resources.


Most likely, an additional plane(s) would be added to include functions like signal processing, communications, etc. 

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