Shatter the AI Memory Wall

Maximize return on CAPEX

GPUs, CPUs and embedded processors are leading the innovation charge for AI and other domain-specific workloads.  However, they will only achieve their true processing capability when both local and off chip memory can keep pace.  Current memory interface solutions and even some on the horizon are still falling short of keeping up with these processing capabilities and requirements.

CrossFire’s Bridgelet™ and Direct Chiplet Interface™ (DCI) solutions shatter the current processor to memory constrains with a 10X improvement in performance, energy savings and cost.  How is this achieved? This patented approach makes off chip memory appear to the processor as if it is on chip.  The only way to do that is to extend the internal memory fabric off chip.

 
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Bridgelet Direct Chiplet Interface (DCI)
Features Benefits Features Benefits
Disaggregates system I/O from memory functions Allows chiplet reuse within or across product families Ultra Short Reach (<500µ) Lower power and area; Higher performance
Die scale interconnect (sub-micron) Higher density and performance; Lower power Protocol Agnostic One PHY for multiple protocols
Enables “Beyond the Reticle” constraint Extend SoC designs Die Scale Interconnect (sub-micron) Higher density and performance; Lower power