The AMD-Xilinx MPSOC based SiP Device Program referenced below is shifting towards a Chiplet based paradigm wherein Bridgelets are utilized to supplement the capabilities of packaged AMD-Xilinx Versal or Ultrascale Plus devices in resource constrained high performance chassis based systems such as VPX. CrossFire is still interested in the concept of integrating an AMD-Xilinx Die and a DDR4/5 Die Memory Subsystem into the footprint of a packaged FPGA. Interested System on Module device providers should contact CrossFire to discuss further.
Xilinx MPSoC based System in Package (SiP) Devices
The CrossFire System in Package (SiP) Platform is architected as a “concept to production” answer to the challenges of engineering, prototyping and releasing to production a miniaturized System in Package (SiP) devices based on the Xilinx MPSoC family of field programmable gate arrays (FPGAs). Identical in footprint to standard Xilinx FPGAs, CrossFire’s MPSoC based SiP devices fit include an UltraScale+ MPSOC die and DDR4 Memory Subsystem.
Recognizing that additional functionality, size, or pinout may be required to meet system requirements, customized implementations are supported to efficiently enable engineering teams to meet their system requirements.
| Requirement | CrossFire's Solution |
|---|---|
| A customizable and readily available hardware and software “evaluation platform” that satisfies the base requirements of a particular use case or market and facilitates a proof of concept (PoC) prototype. | Customers can begin their “proof of concept” (PoC) development utilizing the currently existing ecosystem of Xilinx evaluation boards. CrossFire recommends either the Xilinx “ZCU” family of evaluation kits or the “UltraZed” family of MPSoC-based carrier cards as starting points. |
| A seamless path from PoC to engineering prototype, pre-production, and then production-qualified devices. | Once the proof of concept is finalized, it is on to the engineering prototype. With CrossFire, the typical path is to start with one of our existing modules. Some applications will be able to utilize a module as is, while others will need tweaking to meet the PoC requirements. This process typically takes 3 – 12 months, depending on the degree of customization required. |
| A comprehensive ecosystem (including software, prototyping resources, intellectual property, validation, and certification) to support the device development throughout its lifecycle. | Through its partnership with Xilinx, CrossFire customers have access to their extensive design ecosystem which enables the use of complex FPGAs in various applications. CrossFire’s modules are compatible with Xilinx’s Vivado platform, providing a seamless transition from proof of concept to volume production |
| Xilinx MPSoC |
Footprint (mm x mm) |
PS DRAM (DDR4) |
PL DRAM (DDR4) |
Boot Flash (Quad SPI) |
|---|---|---|---|---|
| ZU9-EG | 31 x31 | 2GB, 4GB | Optional | 512Mb |
| ZU7-EV | 31 x 31 | 2GB, 4GB | 2GB, 4GB | 512Mb |
| ZU5-EV | 31 x 31 | 2GB, 4GB | 2GB, 4GB | 512Mb |
| ZU3-EG | 19 x 19 23 x 23 | 2GB, 4GB 2GB, 4GB | None Optional | 512Mb |
| ZU28 | TBD | TBD | TBD | TBD |